Side channel attacks are a major security concern for smart cards and otherembedded devices. They analyze the variations on the power consumption to findthe secret key of the encryption algorithm implemented within the security IC.To address this issue, logic gates that have a constant power dissipationindependent of the input signals, are used in security ICs. This paper presentsa design methodology to create fully connected differential pull down networks.Fully connected differential pull down networks are transistor networks thatfor any complementary input combination connect all the internal nodes of thenetwork to one of the external nodes of the network. They are memoryless andfor that reason have a constant load capacitance and power consumption. Thistype of networks is used in specialized logic gates to guarantee a constantcontribution of the internal nodes into the total power consumption of thelogic gate.
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